News

RapidSmith 0.5.1 Released

Posted on March 30, 2011

Update RapidSmith to 0.5.1 with a number of bug fixes and added several new methods in the design package. The Instance, Module and Pin class have been updated to include better data structures to provide faster and more convenient access to its members. The routing infrastructure has partially been re-written. See Release Notes for more details. You can download it now or check it out using SVN.

RapidSmith at FCCM 2011

Posted on April 22, 2011

RapidSmith and HMFlow (our rapid prototyping compilation flow built on RapidSmith) will be demonstrated at FCCM Demo Night this year. We have a paper on HMFlow which will be presented that same day. If you are going to FCCM, be sure to come visit us!

RapidSmith 0.5.0 Released

Posted on March 30, 2011

The new version 0.5.0 of RapidSmith now includes all the device files needed, no more lengthy install process! It also includes several other features such as Virtex 7 and Kintex7 support. The wire hash map used to store all wire connections has been custom written and now uses half as much heap space, loads device files upto twice as fast and also routes significantly faster in most cases. See Release Notes for more details. You can download it now or check it out using SVN.

Overhauled RapidSmith Web Site

Posted on March 28, 2011

Sourceforge is slow serving up our dynamic pages so I have switched to some static pages and added a new page called related sites. Related sites has most of the links that are relevant to RapidSmith including some up and coming open source FPGA CAD projects like Torc.

RapidSmith 0.4.0 Released

Posted on February 26, 2011

RapidSmith has another major update release, 0.4.0. This release contains a very exciting feature, bitstream parsing/manipulation/export for Virtex 4, Virtex 5 and Virtex 6 architectures. Several new packages have been added to enable this feature (although, it only parses at the packet and frame level, according to Xilinx documentation). This feature opens up several new possibilities for RapidSmith. It also has a new unified approach to the pin mapping problem (missing information in the XDLRC report) of primitive site pins. It has several bug fixes and new methods added. See Release Notes for more details. You can download it now or check it out using SVN.

RapidSmith 0.3.0 Released

Posted on January 28, 2011

RapidSmith has had a major update release to version 0.3.0. A major change was changing the device files version (requiring you to rebuild the device files). This was done to enable preliminary support of a lot of legacy devices from Xilinx (Spartan 2, Spartan 2E, Spartan 3, Spartan 3A, Spartan 3ADSP, Spartan 3E, Virtex, Virtex E, Virtex 2, and Virtex 2 Pro). An new experimental timing report parser (Xilinx Trace TWR report files) has been added. Several bug fixes and a new FamilyType to help users distinguish the Xilinx FPGA families is now integrated. Several bug when routing Virtex 5 designs have been fixed. See Release Notes for more details. You can download it now or check it out using SVN.

Added Publications and Screenshots Pages

Posted on December 22, 2010

Updated the website with a list of current publications on RapidSmith and a new screenshots page showing the new Design Explorer and Device Browser applications distributed with RapidSmith.

RapidSmith 0.2.2 Released

Posted on November 29, 2010

Updated RapidSmith to 0.2.2. Now includes a new device explorer and device browser GUI application. It also has support for Spartan 6 devices. A hard macro generator is also included as used in a recent publication at FPL 2010. See Release Notes for more details. Download it or check it out using SVN.

RapidSmith 0.2.1 Released

Posted on October 21, 2010

Updated RapidSmith to 0.2.1, includes a few big bug fixes. The XDL parser is completely rewritten (now is independent of JavaCC) and now loads XDL designs 20-30% faster than previous parser. A major bug in the StaticSourceHandler class (central to the BasicRouter and other routers) has been fixed that caused some GND pins to be routed to VCC. It also includes a new XDL export method (Design.saveComparableXDLFile(String fileName)) that is deterministic and allows for easy comparison of two XDL files using diff or other textual comparison programs. Download it or check it out using SVN.

The Qt-jambi jars have now been separated according to OS so the downloads are smaller, but must pick the right file for your OS (Windows and Linux).

RapidSmith 0.2.0 Released

Posted on October 8, 2010

Released RapidSmith 0.2.0! This version now has a full (although basic) design router with an abstract class to help create your own router. It also has preliminary Virtex 6 support. Download it or check it out using SVN.

RapidSmith 0.1.6 Released

Posted on September 30, 2010

Updated RapidSmith to 0.1.6, just a few minor changes and fixes. We now use Qt Jambi as maintained by http://qt-jambi.org. See Release Notes for details. Download it or check it out using SVN.

Stay tuned, new features will be available in the next release such as support for Virtex 6 parts and more examples.

RapidSmith 0.1.5 Released

Posted on August 25, 2010

Updated RapidSmith to 0.1.5 with a few bug fixes and updates to the documentation. See Release Notes for details. Download it or check it out using SVN.

RapidSmith 0.1.4 Released

Posted on August 19, 2010

Our first public release 0.1.4 is out! Download it or check it out using SVN.

Web Site it Up!

Posted on August 17, 2010

Just getting the wiki up and working, source code will be uploaded soon.

Getting Started With RapidSmith

The best place to start is in our documentation which will help you get RapidSmith up and running on your machine.

Next, check out the examples provided in the examples package to start learning how to write your own FPGA CAD tools.

RapidSmith Screenshots